Investigation of TTMC-SVPWM Strategies for Diode Clamped and Cascaded H-bridge Multi-level Inverter Fed Induction Motor Drive

Ravikumar Bhukya, P. Satish Kumar

Abstract


This paper presents a concept of two types multilevel inverters such as diode clamped and cascaded H-bridge for harmonic reduction on high power applications. Normally, multilevel inverters can be used to reduce the harmonic problems in electrical distribution systems. This paer focused on the performance and analysis of a three phase seven level inverter including diode clamped and cascaded H-bridge based on new tripizodal triangular space vector PWM technique approaches. TTMC based modified Space vector Pulse width modulation technique so called tripizodal triangular Space vector Pulse width modulation (TTMC-SVPWM) technique. In this paper the reference sine wave generated as in case of conventional off set injected SVPWM technique. It is observed that the TTMC-Space vector pulse width modulation ensures excellent, close to optimized pulse distribution results and THD is compared to seven level, diode clamped and cascaded multi level inverters. Theoretical investigations were confirmed by the digital simulations using MATLAB/SIMULINK software.


Keywords


Seven level Diode clamped and cascaded inverter; SPWM;TTMC-SPWM ;TTMC-SVPWM ;TTMC-SVAPODPWM ; THD;

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Indonesian Journal of Electrical Engineering and Informatics (IJEEI)
ISSN 2089-3272

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This work is licensed under a Creative Commons Attribution 4.0 International License.

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