Reducing Beat Frequency Oscillation in a Two-phase Sliding Mode-controlled Voltage Regulator Module

Jessica C Magsino, Elmer Ramilo Magsino


During static and dynamic loading conditions, voltage regulator modules (VRMs) are expected to provide regulated voltage with minimal ripple even at high current requirement.  Compared to regular power supplies, VRMs repetitively experience high-frequency loading conditions that is greatly dependent on the software running in the processor utilizing them. In the scenario that when the transient load frequency is near the VRM’s switching frequency, high-magnitude and low-frequency oscillations are observed at the phase currents.  This phenomenon is called the beat frequency oscillation.  In this study, the sliding mode control principle is employed to both the voltage and current share loops of the VRM to reduce the phase currents’ beat frequency oscillations. A fixed frequency sliding mode controller is derived and extensively evaluated using the PSIM simulator.  Our results show that while maintaining equal load sharing among VRMs at less than 5% sharing error and various types of loading conditions, the sliding mode controller can reduce the beat frequency oscillation phenomenon to 20 kHz at maximum with reduced peak current values.   The output voltage is also regulated within the desired ±1.65% band.


Beat Frequency Oscillation; Fixed Frequency; Sliding Mode Control; Voltage and Current Loops; Voltage Regulator Module

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Indonesian Journal of Electrical Engineering and Informatics (IJEEI)
ISSN 2089-3272

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This work is licensed under a Creative Commons Attribution 4.0 International License.

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